Checkpoint: paired ACL-TTL overhead measurement, 6/18 cells

Cells 4-6 complete and verified (480/480 rows, 16/16 cfg coverage, zero
errors each): aarch64/12345 enabled+disabled (a real pair: 310.5s vs
283.0s, +9.7% in the expected direction), riscv64/13579 disabled.

Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>

experiments/bare_metal/runs/acl-ttl-overhead-20260820/timing.csv

@@ -2,3 +2,6 @@ order,arch,seed,acl,start_ts,end_ts,elapsed_s,rows,cfgs_ok,errors
 1,riscv64,12345,disabled,1787246865.003797220,1787247037.443151234,172.439,480,TRUE,0
 2,riscv64,12345,enabled,1787247549.357850085,1787247707.475092723,158.117,480,TRUE,0
 3,aarch64,13579,disabled,1787248108.701960810,1787248383,274.298,480,TRUE,0
+4,aarch64,12345,enabled,1787263540.138566609,1787263850.633268709,310.495,480,TRUE,0
+5,riscv64,13579,disabled,1787263959.600081018,1787264116.655408410,157.055,480,TRUE,0
+6,aarch64,12345,disabled,1787264494.120355867,1787264777.160787083,283.040,480,TRUE,0