Commit Graph
3 Commits
Author SHA1 Message Date
Robert Allan JamesandClaude Opus 5.5 4419ea953f FABRIC-3.10.0 ruled (multi-core now, ahead of O-D; row path A for O-D) and FABRIC-3.10.8 execution plan
- Captain Bob, 2026-09-25: "pin observr and dynmically utilize worker VM's";
  MC-R1..R5 as proposed; MC-R6 changed to start now; O-D relaunches with
  row path A (serial-only DoE rows). The amd64 O-D launch was stopped after
  81 min / 131,537 rows for this.
- FABRIC-3.10.8: the traced inventory of shared state (kernel subsystems
  and the shared VM code -- notably one global dictionary lookup index for
  all VMs), and stages MC-0a..MC-4 with evidence named in advance.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-09-25 12:58:19 -04:00
Robert Allan JamesandClaude Opus 5.5 1777ac59a1 FABRIC-3.10.0: Stadium's per-dispatch path must be partitioned by quota slot, not locked (the multi-core speedup depends on it); expected-gain note
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-09-25 12:44:26 -04:00
Robert Allan JamesandClaude Opus 5.5 85b97ea467 FABRIC-3.10.0: multi-core design (observers pinned to a system core, workers claimed by the physics) and the OS's open gaps
Design only, for Captain Bob's review; nothing authorizes an edit.
- Observers (the Tripod) get system-core affinity where cores allow;
  workers are placed nowhere -- every worker core asks the existing
  compudynamic decision at clean boundaries and claims the winner with one
  atomic compare-and-swap. Static worker placement ruled out (Captain Bob:
  "anti starshipos given there isn't a fixed number of vm's").
- Traces what exists (no SMP bring-up; MADT/PSCI groundwork; no-op kernel
  mutexes; single-writer globals), the per-ISA bring-up, the locking
  inventory, idle/wake by IPI, per-core physics, staging MC-0..MC-4, and
  rulings MC-R1..MC-R6.
- Part II: the open gaps. Filesystem ruled out ("NEVER! anti POSIX!"),
  networking deferred; O-D/merge, multi-core, interrupt-driven devices,
  the fixed-size audit remainder, security policy, hardware, M8/M9,
  FORTH-readable counters, and ten known defects (one new: xHCI input
  context leak per configure).

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-09-25 12:39:35 -04:00