FABRIC-3.10.8 MC-3b: waking a worker core
Each worker core sets up its own IPI receiver before going online (amd64 LAPIC + vector 0x22 with its own stub, aarch64 banked GIC SGI 0, riscv64 sie.SSIE); core 0 sends by ICR / GICD_SGIR / SBI IPI. Park lets exactly one interrupt in without a lost-wake window. Boot self-test: IPI round trips 3/3 and 'woke x3, IPIs x3' on all three ISAs; worker vCPU threads 0.0% on the host. 3-ISA acceptance clean. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
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Claude Opus 5.5
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@@ -60,6 +60,11 @@
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* before, so this path was previously dormant. */
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#define APIC_SPURIOUS_VECTOR 0xFF
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/* amd64 (FABRIC-3.10.8 MC-3b): the inter-processor wake vector. Needs its
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* own stub in isr.S -- vectors past 33 otherwise land in the default stub,
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* which reports 255. */
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#define SK_IPI_VECTOR 0x22
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/* Initialize Local APIC (enables APIC, sets spurious vector) */
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int apic_init(BootInfo *boot_info);
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@@ -72,6 +77,10 @@ uint8_t apic_id(void);
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* Returns 0 once delivered, -1 if still pending after the bound. */
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int apic_send_ipi(uint8_t dest_apic_id, uint32_t icr_low);
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/* amd64 (MC-3b): on a secondary core, enable its own LAPIC (SIVR, TPR 0)
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* so it can take SK_IPI_VECTOR. Its timer LVT stays masked. */
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void apic_secondary_enable(void);
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/* Send End-of-Interrupt signal */
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void apic_eoi(void);
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