Claude
c76a742f2b
Captain Bob, 2026-11-12: "Wire L2, keep L7 on". The table held the 128 cards of the 7-bit L1-L7 space; nothing read L7, and the rolling window recorded whatever the card said, so the 128 were 32 behaviours. - compudynamics.c: cd_tuning_word() sizes the table to 64 (L1-L6). - ssm_jacquard.c: card_bits() makes a card's 7-bit mask, L7 set, where a card is read, seeded and started (C4: 17 -> card 8); ssm_l8_force_config() still takes the 7-bit index, its L7 bit implied. - physics_execution_hooks.c, kernel vm_core.c: the rolling window records only while L2 is on (or before there is a config). - ssm_jacquard.h says what is wired, bit by bit (it said L7 was); v3/CLAUDE.md and the L8 reference corrected in place; FABRIC-3 XLVIII.21. Tests first, seen to fail against HEAD (logs/20261112-210510/kernel-tests): test_ssm_jacquard 4 of 7, test_physics_l2 1 of 4; all pass now. v4 reads no rolling window: acceptance is unchanged; the protocol runs next. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_017RzZgrf7V7Zk2iczBXDRbm
23 lines
474 BLFS
Plaintext
23 lines
474 BLFS
Plaintext
# #188, all kernel host tests, the fix in the tree
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test_gpt
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12 checks, 0 failures
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test_usb_config
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20 checks, 0 failures
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test_sk_v4_stop
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2 checks, 0 failures
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test_sk_v4_slots
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6 checks, 0 failures
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test_sk_v4_mint
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17 checks, 0 failures
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test_sk_v4_identity
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10 checks, 0 failures
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test_heartbeat_export
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4 checks, 0 failures
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test_ssm_jacquard
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7 checks, 0 failures
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test_physics_l2
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4 checks, 0 failures
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check_cap
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3 checks, 0 failures
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all kernel host tests passed
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