Claude
3bd81097e1
The header scan (Captain Bob, 2026-11-10): 788 source files -- 351 with the
SL-1.0 header, 12 with the old name (docs/working/experiments, kept by
ruling), 31 under someone else's licence (tools/kconfig, Linux's, GPL-2.0:
kept), and 394 with none. Ruled: the SPDX form; capsules (.4th, .f18) and
proofs (.thy) left for a ruling of their own (mkcapsule's 64x16 block format,
content-addressed capsules).
253 files now begin
SPDX-License-Identifier: LicenseRef-Starship-1.0
Copyright (c) 2023-2026 Robert A. James
as a /* */ block (C, headers, assembly, linker scripts) or # lines (scripts,
Makefiles, Kconfig; below a shebang or a coding line); tools/mkcapsule.c,
which had the copyright line, gets the SPDX line only.
Not touched: docs/working/ (archive and old campaign material, as the
ruling kept the experiments); v4/system/post_cases.c (generated by
v4/tools/mkpost.py, "do not edit" -- the generator has the header).
Comments only: the kernel builds on amd64, aarch64, riscv64; make -C v4
test-32: 39 programs, 0 failures; every changed script parses.
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01GE3SDvQn5EoxdGufk84zz2
82 lines
3.5 KiB
C
82 lines
3.5 KiB
C
/* SPDX-License-Identifier: LicenseRef-Starship-1.0
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* Copyright (c) 2023-2026 Robert A. James
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*/
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/* test_host_rom_nucleus.c -- the proof: the ROM assembles the system as text.c does, word for word.
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*
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* Plan Task 8 and 9; MACHINE.md section 6, step 1. The system's source is
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* capsules/v4/sys: map-<width>.f18, the fourteen .f18 files and end.f18.
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* Node A is that source assembled off the node by text.c, the oracle (it
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* speaks the ROM's language: constant, set, here, #, ", store, start).
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* Node B is the machine with its ROM, fed the same source through the
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* console. When the ROM starts the system, every word of B's RAM must be
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* A's, except the ROM's own state area (which A does not have), and B must
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* start where A's start says. It also reports what the assembly cost:
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* instructions retired and seconds (Captain Bob: watch the startup cost).
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*/
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#include "rom_harness.h"
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#include "v4/text.h"
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#include <stdlib.h>
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#include <time.h>
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static int failures = 0, checks = 0;
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#define CHECK(c,...) do{checks++; if(!(c)){failures++; printf("FAIL %s:%d: ",__FILE__,__LINE__); printf(__VA_ARGS__); printf("\n");}}while(0)
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static v4_node a, b;
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static v4_text tx;
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/* node A: text.c assembles the system's source, map first and end last */
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static int build_a(void)
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{
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char path[512];
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unsigned i;
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v4_node_reset(&a);
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v4_text_begin(&tx, &a, ROM_ORIGIN);
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for (i = 0; i < ROM_SYS_FILES + 2u; i++) {
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if (i == 0) snprintf(path, sizeof path, "%s/map-%d.f18", V4_SYS_DIR, V4_CELL_BITS);
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else if (i <= ROM_SYS_FILES) snprintf(path, sizeof path, "%s/%s.f18", V4_SYS_DIR, rom_system_files[i - 1]);
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else snprintf(path, sizeof path, "%s/end.f18", V4_SYS_DIR);
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if (!v4_text_assemble_file(&tx, path)) return 0;
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}
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return v4_text_start(&tx) >= 0;
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}
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/* the ROM's own cells: not compared */
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static int excluded(v4_cell w)
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{
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return (w >= OUT_W - 144 && w < OUT_W - 64)
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|| (w >= BUF0_W - 32 && w < BUF0_W - 22)
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|| (w >= BUF0_W - 122 && w < BUF0_W - 119);
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}
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int main(void)
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{
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long words = 0;
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clock_t t0, t1;
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v4_cell w, idle_a;
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CHECK(build_a(), "text.c assembles the system's source to its start: %s", v4_text_error(&tx));
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idle_a = v4_text_start(&tx);
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CHECK(idle_a == v4_text_word(&tx, "(IDLE)"), "the system starts at (IDLE)");
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t0 = clock();
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CHECK(rom_build_system(&b, &words), "the ROM started the system: P %ld, failed %ld at line %ld", (long)b.p,
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(long)b.mem[ROM_FAILED], (long)b.mem[ROM_ERRLINE] + 1);
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t1 = clock();
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printf(" the ROM assembled the system: %lu instructions, %lu instruction words, %.2f s (%d-bit cells)\n",
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(unsigned long)rom_es.anticlock, (unsigned long)words, (double)(t1 - t0) / CLOCKS_PER_SEC, V4_CELL_BITS);
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CHECK(b.p == idle_a, "it starts where text.c's start says: %ld, text.c's %ld", (long)b.p, (long)idle_a);
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CHECK(b.mem[ROM_IMG] == idle_a && b.mem[ROM_IMG + 1] == v4_text_word(&tx, "(FAULTS)")
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&& b.mem[ROM_IMG + 2] == v4_text_word(&tx, "KEY") && b.mem[ROM_IMG + 3] == v4_text_word(&tx, "CR"),
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"the image record holds text.c's addresses");
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for (w = 0; w < (v4_cell)V4_NODE_WORDS; w++) {
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if (excluded(w) || a.mem[w] == b.mem[w]) continue;
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CHECK(0, "RAM word %ld: text.c %lx, ROM %lx", (long)w, (unsigned long)a.mem[w], (unsigned long)b.mem[w]);
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break;
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}
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CHECK(w == (v4_cell)V4_NODE_WORDS, "every word of RAM is the same");
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printf("test_host_rom_nucleus: %d checks, %d failures\n", checks, failures);
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return failures != 0;
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}
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