Claude
16b9747d33
347 headers said "Licensed under the StarForth License, Version 1.0" -- a shortening (Captain Bob, 2026-11-08: "License file SL I think I shortened accidently"); LICENSE is, and has been since the first commit, the Starship License 1.0 (SL-1.0, SPDX LicenseRef-Starship-1.0). 349 files, 566 occurrences, now "Starship License, Version 1.0 (SL-1.0)". Left as they are, pending a ruling: docs/patent/ (the patent figures), docs/formal/ (the citable volumes) and the generated reports under docs/working/experiments/ (32 files). Comments and license text only: the amd64 kernel builds, every changed script parses. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01GE3SDvQn5EoxdGufk84zz2
49 lines
1.8 KiB
C
49 lines
1.8 KiB
C
/*
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StarForth — Steady-State Virtual Machine Runtime
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Copyright (c) 2023–2025 Robert A. James. All rights reserved.
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Licensed under the Starship License, Version 1.0 (SL-1.0).
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*/
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/**
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* rpi5_dtb.h - Raspberry Pi 5 (BCM2712) devicetree-based peripheral
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* discovery, for the native (non-UEFI) boot path (FABRIC-3.md §IV.3).
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*
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* Two lookups: the PL011 UART (early console) and the VideoCore mailbox
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* property interface (framebuffer setup, §IV.3 item 3). Both peripherals
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* live under BCM2712's own devicetree "soc" simple-bus node, which
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* applies one fixed address translation to every child `reg` value —
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* see `rpi5_dtb.c`'s own doc comment for the confirmed offset and where
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* it was verified. `fdt.c`'s reader deliberately does not do general
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* `ranges`-property translation (it is "not a general devicetree
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* library"); this file applies the one, fixed, SoC-wide offset by name
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* instead of teaching `fdt.c` a general mechanism for a single known
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* hardware fact.
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*/
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#ifndef STARKERNEL_RPI5_DTB_H
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#define STARKERNEL_RPI5_DTB_H
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#include <stdint.h>
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/**
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* @brief Find the PL011 UART's CPU-physical base address from the DTB.
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*
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* @param dtb Devicetree blob, as passed to the native boot entry (or
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* `BootInfo->dtb`); NULL is safe.
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* @return Final CPU-physical MMIO base address, or 0 if the node is
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* absent, malformed, or @p dtb is invalid.
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*/
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uint64_t rpi5_uart_base(const void* dtb);
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/**
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* @brief Find the VideoCore mailbox property interface's CPU-physical
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* base address from the DTB.
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*
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* @param dtb Devicetree blob; NULL is safe.
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* @return Final CPU-physical MMIO base address, or 0 if the node is
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* absent, malformed, or @p dtb is invalid.
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*/
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uint64_t rpi5_mailbox_base(const void* dtb);
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#endif /* STARKERNEL_RPI5_DTB_H */
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