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LithosAnanake/docs/v4.0.0/plans
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rajamesandClaude Opus 5.5 42f8a13914 docs(v4.0.0): the ROM is shared code, GA144-style -- an entry table, a permanent state area
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-15 11:10:08 -04:00
..
2026-10-06-step6-storage.md
fix(v4.0.0): storage -- what the review of step 6 found
2026-10-07 08:58:52 -04:00
2026-10-07-step6b-post.md
docs(v4.0.0): step 6b -- POST is the kernel's: design, acceptance and plan
2026-10-07 10:27:47 -04:00
2026-10-07-step6c-refusals-and-waits.md
docs(v4.0.0): step 6c -- refusals and waits: rulings, design, acceptance and plan
2026-10-07 19:43:43 -04:00
2026-10-07-step6d-the-wait.md
docs(v4.0.0): step 6d -- the plan; and the wait offers on each port, not one
2026-10-07 22:27:21 -04:00
2026-10-08-step6e-messages-on-the-wire.md
docs(v4.0.0): step 6e -- the plan; a mark on each wire, a sleep woken by a message coming, and the room probe
2026-10-08 12:58:13 -04:00
2026-10-15-machine-step1-rom.md
docs(v4.0.0): the ROM is shared code, GA144-style -- an entry table, a permanent state area
2026-10-15 11:10:08 -04:00
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