rajamesandJunie
a8b70e88d3
Source tree reorganization: - Move StarForth v3 engine to v3/ (src/, include/, Makefile) - Move kernel to kernel/ (src/, include/, linker/, Makefile) - Create v4/ skeleton for F18-ISA golden model (DECOMPOSITION.md, JUSTIFICATION.md) - Move FABRIC-0..4.md to docs/fabric/ - Move ONTOLOGY.md and ROADMAP.md to docs/ Board infrastructure: - Add boards/ser5/, boards/raspi/, boards/milkv/, boards/zynq7020/ - Each board has board.mk (ISA, CPU flags, boot recipe) and README.md - Root Makefile becomes thin dispatcher: boot_image, all, clean, docs take TARGET - make boot_image TARGET=SER5|RASPI|MILKV builds one GPT/MBR image per board - ZYNQ7020 target exists but stops with clear error (ARMv7 port not built yet) - scripts/mkdiskimage.sh builds disk images for all boards Docs pipeline: - docs/book/ with LaTeX master (main.tex) and Makefile - pandoc converts Markdown to LaTeX at build time - Two Lua filters: table-widths.lua (wide tables wrap), code-breaks.lua (inline code breaks) - make docs builds single PDF (754 pages, 0 missing characters) - make docs TARGET=<board> adds board appendix - build/docs/<book|board>/meta.tex stamps git commit into PDF Bug fixes: - 42 include paths that only worked by accident now use correct relative paths - clang-18 hardcode replaced with configurable CC variable (fixed aarch64 build) - Pi 5: kernel_2712.img linked at 0x80000, .bss zeroed, memory reserved - Doxyfile, .clang-tidy, README.md, Kconfig paths updated Verified: - Hosted v3 build passes 1012 tests, 0 failures - SER5 image boots in QEMU (OVMF), POST passes, K exact (65536 = Q48_ONE) - Milk-V image boots in QEMU (OpenSBI + U-Boot + bootefi), POST passes - make clean TARGET=<board> removes only that board and its ISA objects - make all builds all boards, hosted v3, and docs in one run Co-authored-by: Junie <junie@jetbrains.com>
49 lines
1.8 KiB
C
49 lines
1.8 KiB
C
/*
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StarForth — Steady-State Virtual Machine Runtime
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Copyright (c) 2023–2025 Robert A. James. All rights reserved.
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Licensed under the StarForth License, Version 1.0.
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*/
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/**
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* rpi5_dtb.h - Raspberry Pi 5 (BCM2712) devicetree-based peripheral
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* discovery, for the native (non-UEFI) boot path (FABRIC-3.md §IV.3).
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*
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* Two lookups: the PL011 UART (early console) and the VideoCore mailbox
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* property interface (framebuffer setup, §IV.3 item 3). Both peripherals
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* live under BCM2712's own devicetree "soc" simple-bus node, which
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* applies one fixed address translation to every child `reg` value —
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* see `rpi5_dtb.c`'s own doc comment for the confirmed offset and where
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* it was verified. `fdt.c`'s reader deliberately does not do general
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* `ranges`-property translation (it is "not a general devicetree
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* library"); this file applies the one, fixed, SoC-wide offset by name
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* instead of teaching `fdt.c` a general mechanism for a single known
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* hardware fact.
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*/
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#ifndef STARKERNEL_RPI5_DTB_H
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#define STARKERNEL_RPI5_DTB_H
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#include <stdint.h>
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/**
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* @brief Find the PL011 UART's CPU-physical base address from the DTB.
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*
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* @param dtb Devicetree blob, as passed to the native boot entry (or
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* `BootInfo->dtb`); NULL is safe.
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* @return Final CPU-physical MMIO base address, or 0 if the node is
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* absent, malformed, or @p dtb is invalid.
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*/
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uint64_t rpi5_uart_base(const void* dtb);
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/**
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* @brief Find the VideoCore mailbox property interface's CPU-physical
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* base address from the DTB.
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*
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* @param dtb Devicetree blob; NULL is safe.
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* @return Final CPU-physical MMIO base address, or 0 if the node is
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* absent, malformed, or @p dtb is invalid.
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*/
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uint64_t rpi5_mailbox_base(const void* dtb);
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#endif /* STARKERNEL_RPI5_DTB_H */
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