rajamesandClaude Opus 5.5
067f317c47
First code for StarForth v4 (JUSTIFICATION.md section 10, step 1): one node of the 32-instruction core as a C99 model, with cell width as a build parameter. - Node: P, A, B, F18 circular stacks (10 and 9 deep, D-2), word-addressed memory (D-1), 5% guard bands on every bounded list. - Instruction word: six 5-bit slots in 32 bits at every cell width. - Executor: all 32 opcodes of DECOMPOSITION.md 1.3. Cell arithmetic wraps explicitly; no signed overflow or implementation-defined shift. - Heat: per-opcode and per-call-target counters and the anti-clock, driven by instruction retirement (1.4, D-6 interim). - Slot packer and runner for tests, and a reference unsigned multiply in plain C99 with no 128-bit type. Tests run at 32- and 64-bit cells, and under ASan and UBSan. They cover every opcode and execute the first section 4 definitions (NIP SWAP OR NEGATE ROT 0< 0= 2DUP - U<) against the C operation each stands for. UM* as written in section 4 is exact only while u1 <= 2^(n-2). Two known failing cases are pinned in test_foundation.c until it is rewritten. DECOMPOSITION.md: record D-9, the instruction word is 32 bits at every cell width (ruled 2026-10-02). Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
28 lines
970 B
C
28 lines
970 B
C
/* umul.c -- reference unsigned multiply. See umul.h.
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*
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* Schoolbook multiplication on half-cells, in v4_ucell only. No wider type is
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* used, so the same code is correct at both cell widths and builds on a host
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* with no 128-bit integer (ARMv7 is one, and is a v4 host).
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*/
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#include "v4/umul.h"
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#define HALF_BITS (V4_CELL_BITS / 2)
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#define HALF_MASK ((((v4_ucell)1) << HALF_BITS) - 1u)
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void v4_umul(v4_ucell u1, v4_ucell u2, v4_ucell *ulo, v4_ucell *uhi)
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{
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v4_ucell a0 = u1 & HALF_MASK, a1 = u1 >> HALF_BITS;
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v4_ucell b0 = u2 & HALF_MASK, b1 = u2 >> HALF_BITS;
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v4_ucell p00 = a0 * b0;
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v4_ucell p10 = a1 * b0;
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v4_ucell p01 = a0 * b1;
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v4_ucell p11 = a1 * b1;
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/* Cannot overflow: at most (2^h - 1) + (2^h - 1) + (2^h - 1)^2 = 2^2h - 1. */
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v4_ucell mid = (p00 >> HALF_BITS) + (p10 & HALF_MASK) + p01;
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if (ulo) *ulo = (mid << HALF_BITS) | (p00 & HALF_MASK);
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if (uhi) *uhi = p11 + (p10 >> HALF_BITS) + (mid >> HALF_BITS);
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}
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