rajamesandJunie
a8b70e88d3
Source tree reorganization: - Move StarForth v3 engine to v3/ (src/, include/, Makefile) - Move kernel to kernel/ (src/, include/, linker/, Makefile) - Create v4/ skeleton for F18-ISA golden model (DECOMPOSITION.md, JUSTIFICATION.md) - Move FABRIC-0..4.md to docs/fabric/ - Move ONTOLOGY.md and ROADMAP.md to docs/ Board infrastructure: - Add boards/ser5/, boards/raspi/, boards/milkv/, boards/zynq7020/ - Each board has board.mk (ISA, CPU flags, boot recipe) and README.md - Root Makefile becomes thin dispatcher: boot_image, all, clean, docs take TARGET - make boot_image TARGET=SER5|RASPI|MILKV builds one GPT/MBR image per board - ZYNQ7020 target exists but stops with clear error (ARMv7 port not built yet) - scripts/mkdiskimage.sh builds disk images for all boards Docs pipeline: - docs/book/ with LaTeX master (main.tex) and Makefile - pandoc converts Markdown to LaTeX at build time - Two Lua filters: table-widths.lua (wide tables wrap), code-breaks.lua (inline code breaks) - make docs builds single PDF (754 pages, 0 missing characters) - make docs TARGET=<board> adds board appendix - build/docs/<book|board>/meta.tex stamps git commit into PDF Bug fixes: - 42 include paths that only worked by accident now use correct relative paths - clang-18 hardcode replaced with configurable CC variable (fixed aarch64 build) - Pi 5: kernel_2712.img linked at 0x80000, .bss zeroed, memory reserved - Doxyfile, .clang-tidy, README.md, Kconfig paths updated Verified: - Hosted v3 build passes 1012 tests, 0 failures - SER5 image boots in QEMU (OVMF), POST passes, K exact (65536 = Q48_ONE) - Milk-V image boots in QEMU (OpenSBI + U-Boot + bootefi), POST passes - make clean TARGET=<board> removes only that board and its ISA objects - make all builds all boards, hosted v3, and docs in one run Co-authored-by: Junie <junie@jetbrains.com>
75 lines
1.9 KiB
Plaintext
75 lines
1.9 KiB
Plaintext
/* Linker script for StarKernel UEFI Loader (riscv64) - ELF64 intermediate */
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/* Linked as shared ELF, then converted to PE via objcopy -O pei-riscv64-little */
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/*
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* Section layout:
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* .text/.rodata/.data — code and initialized data
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* .bss — uninitialized data (right after .data, VMA-only, no file data)
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* .reloc at 0x700000 — PE base relocation table injected post-link
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* (large fixed gap avoids overlap with ~6MB BSS)
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* .rela.dyn / ELF dyn — ELF dynamic sections, stripped before PE conversion
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*/
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OUTPUT_FORMAT("elf64-littleriscv")
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OUTPUT_ARCH(riscv:rv64)
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ENTRY(efi_main)
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SECTIONS
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{
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. = 0x1000;
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__loader_start = .;
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.text : {
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__text_start = .;
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*(.text.entry)
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*(.text .text.*)
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__text_end = .;
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}
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.rodata : ALIGN(4K) {
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__rodata_start = .;
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*(.rodata .rodata.*)
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__rodata_end = .;
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}
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.data : ALIGN(4K) {
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__data_start = .;
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*(.data .data.*)
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*(.got .got.*)
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*(.got.plt)
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__data_end = .;
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}
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/* BSS immediately after .data — no gap, no section overlap */
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.bss : ALIGN(4K) {
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__bss_start = .;
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*(.bss .bss.*)
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*(COMMON)
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__bss_end = .;
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}
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__loader_end = .;
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/* PE base relocation table — immediately after BSS (self-adjusting).
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* gen_pe_reloc.py replaces this stub with IMAGE_REL_BASED_DIR64 entries.
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* ALIGN(4K) avoids the old fixed-address overlap when BSS grows. */
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.reloc : ALIGN(4K) {
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KEEP(*(.reloc))
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}
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/* ELF dynamic sections — stripped by objcopy before PE conversion */
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.rela.dyn : ALIGN(4K) { *(.rela .rela.*) }
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.dynsym : { *(.dynsym) }
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.dynamic : { *(.dynamic) }
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/DISCARD/ : {
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*(.comment)
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*(.note*)
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*(.eh_frame)
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*(.gnu.hash)
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*(.hash)
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*(.dynstr)
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*(.riscv.attributes)
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}
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}
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