rajamesandClaude Opus 5.5
0e2c60dac3
boards/BRINGUP.md R2/R3, FABRIC-3 SXXXIX. The entry stub cleans the cache over the image, builds an identity map (the image's GiB Normal, the rest Device) and enables MMU and caches at EL2 (or EL1); rpi5_mmu.c makes the devicetree's RAM Normal and the framebuffer uncached. Mailbox waits give up after one second; the buffer is cleaned around the exchange; the framebuffer address goes through dma-ranges, not a Pi 4 mask. New rpi5-rehearsal target runs the native image on QEMU virt at EL2. It found three more that would each have stopped the board: the PL011 shift (mine, c9519173; the host test asserted it), the GIC address not carried through /soc's ranges (new fdt_reg_address(), checked against the real Pi 5 DTB), and no timer IRQ at EL2 (HCR_EL2.IMO/FMO/AMO). Rehearsal: POST 1052 passed, same parity hash as UEFI. Standard acceptance on three ISAs: POST 1052, hash 0x82f4ae7cb2e2d424. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
78 lines
2.1 KiB
Plaintext
78 lines
2.1 KiB
Plaintext
/* Linker script for the Raspberry Pi 5 native (non-UEFI) kernel image.
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*
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* Linked from the same objects as the aarch64 kernel ELF, entered at
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* rpi5_native_start (arch/aarch64/native_rpi5_entry.S, section
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* .text.entry -- placed first so it sits at the load address), then
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* flattened with `objcopy -O binary` into kernel_2712.img.
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*
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* Load address 0x80000 must match boards/raspi/config.txt's
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* kernel_address=0x80000: Pi 5 firmware's own default for
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* kernel_2712.img is 0x200000, so the address is pinned on both sides
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* rather than left to the firmware default.
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*
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* __kernel_start/__kernel_end span the whole image including .bss so
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* pmm_init() reserves every page the image occupies (aarch64 boot.S's
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* zero-length substitutes are only correct for the UEFI loader path,
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* where UEFI owns the image pages). __bss_start/__bss_end are 16-byte
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* aligned for the entry stub's zeroing loop: firmware does not clear
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* memory past the end of the file it loads.
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*/
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OUTPUT_FORMAT("elf64-littleaarch64")
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OUTPUT_ARCH(aarch64)
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ENTRY(rpi5_native_start)
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SECTIONS
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{
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/* RPI5_NATIVE_BASE comes from kernel/Makefile (--defsym): 0x80000 on
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* the Pi 5; 0x40080000 for the QEMU virt rehearsal only, whose RAM
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* starts at 0x40000000 and which loads a raw image 0x80000 into it. */
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. = RPI5_NATIVE_BASE;
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__kernel_start = .;
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.text : {
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__text_start = .;
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KEEP(*(.text.entry))
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*(.text .text.*)
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__text_end = .;
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}
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.rodata : ALIGN(4K) {
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__rodata_start = .;
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*(.rodata .rodata.*)
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__rodata_end = .;
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}
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.data : ALIGN(4K) {
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__data_start = .;
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*(.data .data.*)
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*(.got .got.*)
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__data_end = .;
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}
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.rela.dyn : ALIGN(8) {
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*(.rela .rela.*)
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}
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.bss (NOLOAD) : ALIGN(4K) {
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__bss_start = .;
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*(.bss .bss.*)
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*(COMMON)
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. = ALIGN(16);
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__bss_end = .;
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}
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. = ALIGN(4K);
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__kernel_end = .;
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/DISCARD/ : {
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*(.comment)
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*(.note*)
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*(.eh_frame)
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*(.dynamic)
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*(.dynsym)
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*(.interp)
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}
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}
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