Harts from the DTB /cpus or, on QEMU (ACPI, no DTB), the MADT RINTC
entries; the boot hart is the one SBI HSM reports STARTED. SBI HSM
hart_start into ap_entry.S (stvec/satp copied, FPU on, tp set), park.
Hart 1 online in S-mode with its own block; its vCPU thread 0.0% on the
host. QEMU riscv64 -smp 2 -name debug-threads=on. All three ISAs now
boot two cores; 3-ISA acceptance clean.
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
