rajamesandClaude Opus 5.5
029a8ed9cf
FABRIC-3.5 SXXXII, closing FABRIC-3 SXXIX bug 2 (SXXXVI). A send marks the receiver for the switch signal; the VM's own loop on its native stack takes its messages and yields; Hera's idle beat makes the pending switch instead of running other VMs' messages on her stack; every VM gets switcher turns from birth; the drain refuses any call outside the VM's own context (the test: it held every relayed line before, none now). Found on the way: amd64's first-entry frame left rsp 8 bytes off the SysV entry alignment (#GP on the first interpreter run on a VM's own stack), and a VM yielding from its loop was marked SWITCHED_OUT, which stopped console relay after one message and would have made KILL refuse it. Relay of four lines to a WIREBIND identity on all three ISAs, five hot-plugged identities, and standard acceptance (POST 1052, hash 0x08873e0f44b7cb2a) all pass. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
88 lines
3.4 KiB
ArmAsm
88 lines
3.4 KiB
ArmAsm
/*
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* switch.S (amd64) - Cooperative VM context switch primitive.
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*
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* FABRIC-3.md §XXVIII (Stage 2, preemptive-context-switch save/restore
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* primitive, 2026-09-13). This is deliberately NOT the same mechanism as
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* isr.S's interrupt trap frame (Stage 0) -- that saves every register
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* because an interrupt is not a call site the interrupted code knows
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* about. sk_vm_switch_to() IS an ordinary function call (SWITCH-TO's C
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* handler calls it directly), so the standard System V AMD64 ABI already
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* guarantees every caller-saved register (rax, rcx, rdx, rsi, rdi, r8-r11,
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* all XMM) is the caller's own problem to preserve across the call, exactly
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* like any other call. Only the callee-saved set -- rbx, rbp, r12-r15 --
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* needs explicit handling here, because this function does not really
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* "return" in the normal sense: it swaps to a completely different stack
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* and (from the newly-resumed context's point of view) appears to return
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* from whichever earlier call to this same function originally parked it.
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* SysV has no callee-saved XMM registers at all, so there is no FP state
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* to carry here.
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*
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* void sk_vm_switch_to(uint64_t *save_sp_out, uint64_t new_sp);
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* rdi = save_sp_out, rsi = new_sp
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*
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* For a VM that has never run before, new_sp must point at a synthetic
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* frame built to this exact layout by the C glue (switch.c): six zeroed
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* quadwords (r15, r14, r13, r12, rbx, rbp -- values irrelevant, never a
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* real prior context) followed by the trampoline entry address at
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* new_sp+48, so the final `ret` below jumps there instead of into some
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* prior caller.
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*/
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.intel_syntax noprefix
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.section .text
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.hidden sk_vm_switch_to
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.global sk_vm_switch_to
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sk_vm_switch_to:
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push rbp
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push rbx
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push r12
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push r13
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push r14
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push r15
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mov [rdi], rsp /* *save_sp_out = rsp (this context's parked SP) */
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mov rsp, rsi /* rsp = new_sp (switch stacks) */
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pop r15
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pop r14
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pop r13
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pop r12
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pop rbx
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pop rbp
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ret
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/*
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* uint64_t sk_vm_switch_prime(uint64_t stack_top, void *entry);
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*
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* Builds the synthetic frame described above at the top of a fresh native
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* stack, so the first ever sk_vm_switch_to() into it lands at `entry`
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* instead of some real prior caller. Returns the resulting sp value to
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* pass as sk_vm_switch_to()'s new_sp. Kept in this file (not C) so the
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* layout can never drift from what sk_vm_switch_to() above actually
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* expects -- one set of offsets, not two copies to keep in sync.
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*/
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.hidden sk_vm_switch_prime
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.global sk_vm_switch_prime
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sk_vm_switch_prime:
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mov rax, rdi
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/* 64, not 56 (2026-10-14): one more slot above the return address,
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* where a caller's own return address would sit. `ret` into `entry`
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* then leaves rsp at stack_top - 8, i.e. rsp + 8 a multiple of 16,
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* exactly as after a real `call` -- the SysV ABI's entry alignment.
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* With 56, entry began 8 bytes off: harmless while the entry function
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* only switched back, a #GP (an aligned SSE store to the stack) the
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* first time it ran the interpreter on this stack. */
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sub rax, 64
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mov qword ptr [rax+56], 0 /* no caller: a null return address */
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mov qword ptr [rax+0], 0 /* r15 */
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mov qword ptr [rax+8], 0 /* r14 */
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mov qword ptr [rax+16], 0 /* r13 */
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mov qword ptr [rax+24], 0 /* r12 */
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mov qword ptr [rax+32], 0 /* rbx */
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mov qword ptr [rax+40], 0 /* rbp */
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mov [rax+48], rsi /* return address = entry */
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ret
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