Artemis Milestone 2a complete: xHCI register header, PCI ID confirmed

live via QMP, ring sizing decided

include/starkernel/xhci.h: Capability/Operational/Runtime register
layouts, Port Register Set, Interrupter Register Set, Doorbell Array,
16-byte TRB struct -- all from the xHCI 1.2 spec, no existing
reference in this tree to build from (unlike virtio-blk). volatile
fields, no packed attribute, matching virtio_blk.c's documented
riscv64/QEMU-MMIO precedent. Compile-checked clean, sizeof(xhci_trb_t)
verified == 16.

QEMU qemu-xhci's PCI vendor:device ID (0x1B36:0x000D) confirmed live
via QMP query-pci against a real running instance -- not assumed from
memory, matches the Milestone 1 QMP infrastructure just built.

Ring sizing decided: fixed 256-TRB (one page) Command Ring and Event
Ring, single interrupter -- documented rationale in the header.

Bonus finding: src/starkernel/pci/pci.c already has more reusable
infrastructure than Milestone 2b assumed (pci_find_first is ID-based
lookup already existing; pci_bar/pci_map_bar/pci_enable are already
generic) -- 2b is smaller than originally scoped, noted in the punch
list.

Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>

FABRIC-2.md

@@ -3067,18 +3067,31 @@ Nothing in Section U/V/W's home-blocks thread is testable past this point withou
 roughly bottom-up: PCI discovery → controller bring-up → command/event rings → port/hotplug
 detection → device enumeration → mass-storage class → read/write.
 
-**2a. Research/spec groundwork (do first, nothing below can be scoped precisely without it)**
-- [ ] Confirm xHCI is the right target controller class (vs. EHCI/OHCI) for QEMU's
-      `qemu-xhci` device and for realistic modern real hardware — xHCI is the USB 3.x
-      standard and QEMU's default modern USB controller, but confirm no fallback to EHCI is
-      needed for older/simpler test hardware
-      before writing controller-bringup code
-- [ ] Pull the xHCI register-interface layout (Capability Registers, Operational Registers,
-      Runtime Registers, Doorbell array — the four MMIO regions) from the xHCI spec; this
-      project has no existing xHCI reference to build from (unlike virtio-blk, which had the
-      virtio spec's existing precedent already used in this tree)
-- [ ] Decide command-ring and event-ring sizes/allocation strategy up front (fixed small
-      ring vs. dynamically sized) — affects the memory-management code below
+**2a. Research/spec groundwork (do first, nothing below can be scoped precisely without it) ✅ DONE 2026-08-22**
+- [x] Confirmed xHCI (not EHCI/OHCI) via `qemu-system-x86_64 -device help`: `qemu-xhci`,
+      `usb-storage` (bus `usb-bus`) both available in this environment. Vendor/device ID
+      confirmed **live via QMP** `query-pci` against a real running instance (not assumed
+      from memory) — `qemu-xhci` reports PCI vendor `0x1B36` (Red Hat, Inc.), device `0x000D`.
+- [x] Pulled the xHCI register-interface layout into a real header:
+      `include/starkernel/xhci.h` — Capability Registers, Operational Registers (incl. Port
+      Register Set), Runtime Registers (incl. Interrupter Register Set), Doorbell Array, and
+      the 16-byte TRB layout. Compile-checked clean (`gcc -std=c99 -Wall -Wextra`, zero
+      warnings) and `sizeof(xhci_trb_t) == 16` verified. Matches `virtio_blk.c`'s established
+      precedent: `volatile` fields, no `packed` attribute (that file's own documented
+      riscv64/QEMU-MMIO lesson about byte-wise access to packed structs applies identically
+      here, since the xHCI spec layout is naturally aligned at every offset already).
+- [x] Ring sizing decided and documented in the header: fixed 256-TRB (one page, 4096-byte)
+      Command Ring and Event Ring, single Interrupter (0) only — matches this codebase's
+      existing preference for fixed page-sized allocations over dynamic growth (e.g.
+      `KRD_MAX_BLOCKS`'s fixed RAMDRIVE size), and this driver's actual need (one drive at a
+      time, hotplug detection + basic read/write, not high-throughput multi-device USB).
+
+**Bonus finding, same pass:** `src/starkernel/pci/pci.c` already has more reusable
+infrastructure than 2b's punch-list items assumed — `pci_find_first(vendor,device,*out)`
+already exists (ID-based lookup, not class-code scanning — 2b's wording should be read as "ID
+match" not "class code match"), and `pci_bar()`/`pci_map_bar()`/`pci_enable()` are already
+generic, reusable as-is for the xHCI BAR0 mapping and bus-master enable. 2b is smaller than
+originally scoped.
 
 **2b. PCI discovery**
 - [ ] Extend `src/starkernel/pci/pci.c`'s enumeration to recognize the xHCI PCI class code