FABRIC-3.10.8 MC-1b: aarch64's second core online and parked
Cores from the DTB /cpus or, on QEMU (ACPI, no DTB), the MADT GICC entries; the MADT lookup is now shared (hal/acpi.c) with amd64. PSCI CPU_ON through the discovered conduit into ap_entry.S, which copies the boot core's MMU/control state, sets TPIDR_EL1 and parks. Core 1 online at EL1 with its own block; its vCPU thread 0.0% on the host. QEMU aarch64 -smp 2 -name debug-threads=on. 3-ISA acceptance clean. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
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Claude Opus 5.5
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@@ -60,4 +60,8 @@ int arch_smp_start(BootInfo *boot_info, sk_percpu_t *pc, void *stack_top);
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/* One park step: interrupts stay masked; returns when the core wakes. */
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void arch_smp_park_once(void);
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/* Once `pc` is online: what the ISA can say about how it arrived (the
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* exception level, the privilege mode), as a short phrase for its line. */
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const char *arch_smp_arrival(const sk_percpu_t *pc);
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#endif /* STARKERNEL_SMP_H */
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