FABRIC-3.10.8 MC-1b: aarch64's second core online and parked
Cores from the DTB /cpus or, on QEMU (ACPI, no DTB), the MADT GICC entries; the MADT lookup is now shared (hal/acpi.c) with amd64. PSCI CPU_ON through the discovered conduit into ap_entry.S, which copies the boot core's MMU/control state, sets TPIDR_EL1 and parks. Core 1 online at EL1 with its own block; its vCPU thread 0.0% on the host. QEMU aarch64 -smp 2 -name debug-threads=on. 3-ISA acceptance clean. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
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co-authored by
Claude Opus 5.5
parent
24bde47481
commit
3a2ba5149f
@@ -485,6 +485,9 @@ endif
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ifeq ($(ARCH),riscv64)
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LOADER_ASM += $(KERNEL_SRC)/arch/$(ARCH)/kernel_entry.S
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endif
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ifeq ($(ARCH),aarch64)
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LOADER_ASM += $(KERNEL_SRC)/arch/$(ARCH)/ap_entry.S
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endif
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LOADER_ARCH_SRCS := \
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$(KERNEL_SRC)/arch/$(ARCH)/arch.c \
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@@ -502,6 +505,10 @@ ifeq ($(ARCH),riscv64)
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LOADER_ARCH_SRCS += \
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$(KERNEL_SRC)/arch/$(ARCH)/plic.c
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endif
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ifeq ($(ARCH),aarch64)
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LOADER_ARCH_SRCS += \
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$(KERNEL_SRC)/arch/$(ARCH)/smp.c
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endif
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else
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LOADER_SRCS_BASE := \
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$(KERNEL_SRC)/boot/uefi_loader.c \
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@@ -950,6 +957,8 @@ else ifeq ($(ARCH),aarch64)
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qemu-system-aarch64 \
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-machine virt \
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-cpu cortex-a57 \
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-smp 2 \
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-name debug-threads=on \
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$$(if [ -n "$$AAVMF_VARS" ]; then \
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echo "-drive if=pflash,format=raw,readonly=on,file=$$AAVMF_CODE -drive if=pflash,format=raw,file=$$AAVMF_VARS"; \
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else \
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